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  ? semiconductor components industries, llc, 2003 july, 2003 ? rev. 7 1 publication order number: ncp1050/d ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 monolithic high voltage gated oscillator power switching regulator the ncp1050 through ncp1055 are monolithic high voltage regulators that enable end product equipment to be compliant with low standby power requirements. this device series combines the required converter functions allowing a simple and economical power system solution for office automation, consumer, and industrial products. these devices are designed to operate directly from a rectified ac line source. in flyback converter applications they are capable of providing an output power that ranges from 6.0 w to 40 w with a fixed ac input of 100 v, 115 v, or 230 v, and 3.0 w to 20 w with a variable ac input that ranges from 85 v to 265 v. this device series features an active startup regulator circuit that eliminates the need for an auxiliary bias winding on the converter transformer, fault detector and a programmable timer for converter overload protection, unique gated oscillator configuration for extremely fast loop response with double pulse suppression, power switch current limiting, input undervoltage lockout with hysteresis, thermal shutdown, and auto restart fault detection. these devices are available in economical 8?pin dual?in?line and 4?pin sot?223 packages. features ? startup circuit eliminates the need for transformer auxiliary bias winding ? optional auxiliary bias winding override for lowest standby power applications ? converter output overload and open loop protection ? auto restart fault protection ? ic thermal fault protection ? unique, dual edge, gated oscillator configuration for extremely fast loop response ? oscillator frequency dithering with controlled slew rate driver for reduced emi ? low power consumption allowing european blue angel compliance ? on?chip 700 v power switch circuit and active startup circuit ? rectified ac line source operation from 85 v to 265 v ? input undervoltage lockout with hysteresis ? oscillator frequency options of 44 khz, 100 khz, 136 khz typical applications ? ac?dc converters ? wall adapters ? portable electronic chargers ? low power standby and keep?alive supplies dip?8 case 626a p suffix 1 8 marking diagrams x = current limit (0, 1, 2, 3, 4, 5) z = oscillator frequency (a, b, c) a = assembly location wl, l = wafer lot yy, y = year ww, w = work week 1 8 pin: 1. v cc 2. control input 3, 7?8. ground 4. no connection 5. power switch drain ncp105xz awl yyww see detailed ordering and shipping information on page 22 of this data sheet. ordering information http://onsemi.com sot?223 case 318e st suffix 1 4 n5xz alyw pin: 1. v cc 2. control input 3. power switch drain 4. ground 1 4
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 2 figure 1. typical application startup & v cc regulator circuit v cc fault detector power switch circuit oscillator & gating logic control input power switch circuit output 3, 7?8 1 2 5 + snubber + + + ? converter dc output ac line input ground pin function description pin (sot?223) pin (dip?8) function description 1 1 v cc this is the positive supply voltage input. during startup, power is supplied to this input from pin 5. when v cc reaches v cc (on), the startup circuit turns off and the output is allowed to begin switching with 1.0 v hysteresis on the v cc pin. the capacitance connected to this pin programs fault timing and frequency modulation rate. 2 2 control input the power switch circuit is turned off when a current greater than approximately 50  a is drawn out of or applied to this pin. a 10 v clamp is built onto the chip to protect the device from esd damage or overvoltage conditions. 4 3, 7, 8 ground this pin is the control circuit and power switch circuit ground. it is part of the integrated circuit lead frame. ? 4 no connection 3 5 power switch drain this pin is designed to directly drive the converter transformer primary, and internally connects to power switch and startup circuit.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 3 ? + snubber startup circuit internal bias leading edge blanking thermal shutdown oscillator fault detector ? + r s q ck r q ? + s r q + + + + + + + + + ? converter dc output power switch circuit output ground control input ac line input driver power switch circuit turn off latch turn on latch fault latch v cc bypass/ fault timing/ v co sweep control 10 v current limit comparator 2.6 v 3.3 v 10 v 48  a 48  a i h = 10  a i h = 10  a undervoltage lockout v cc figure 2. representative block diagram startup/v cc reg 7.5/8.5 v 4.5 v v cc r sense
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 4 leading edge on feedback off delay on duty cycle off leading edge on duty cycle off leading edge on current limit off leading edge on duty cycle off no second pulse primary current power switch circuit gate drive 0  a 37.5  a 47.5  a oscillator clock oscillator duty cycle 7.5 v 8.5 v v cc current limit threshold current limit propagation delay i control, sink figure 3. timing diagram for gated oscillator with dual edge pwm f osc (high) f osc (low)
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 5 v (pin 5) 0  a 37.5  a 47.5  a i control, sink v cc v cc(reset) v cc(off) v cc(on) 0 v i (start) 6.3 ma 0 ma i cc1 i cc2 i cc3 0 ma i (start) fault applied fault removed hysteretic regulation i cc1 , current measurement i cc2 , current measurement i cc3 , current measurement figure 4. non?latching fault condition timing diagram i cc
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 6 maximum ratings (note 1) rating symbol value unit power switch and startup circuit drain voltage range drain current peak during transformer saturation v ds i ds(pk)  0.3 to 700 2.0 i lim max v a power supply/v cc bypass and control input voltage range current v ir i max  0.3 to 10 100 v ma thermal characteristics p suffix, plastic package case 626a?01 junction?to?lead junction?to?air, 2.0 oz. printed circuit copper clad 0.36 sq. inch 1.0 sq. inch st suffix, plastic package case 318e?04 junction?to?lead junction?to?air, 2.0 oz. printed circuit copper clad 0.36 sq. inch 1.0 sq. inch r  jl r  ja r  jl r  ja 9.0 77 60 14 74 55 c/w operating junction temperature t j  40 to +150 c storage temperature t stg  65 to +150 c 1. maximum ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolute maximum?rated conditions is not implied. functional operation should be restricted to the recommended operating conditions. a. this device series contains esd protection and exceeds the following tests: pins 1?3: human body model 2000 v per mil?std?883, method 3015. machine model method 400 v. pin 5: human body model 1000 v per mil?std?883, method 3015. machine model method 400 v. pin 5 is connected to the power switch and start?up circuits, and is rated only to the max voltage of the part, or 700 v. b. this device contains latch?up protection and exceeds  100 ma per jedec standard jesd78.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 7 electrical characteristics (v cc = 8.0 v, for typical values t j = 25 c, for min/max values, t j is the operating junction temperature range that applies (note 2), unless otherwise noted.) characteristics symbol min typ max unit oscillator frequency (v cc = 7.5 v) t j = 25 c: a suffix device b suffix device c suffix device t j = t low to t high a suffix device b suffix device c suffix device f osc(low) 38 87 119 37 84 113 42.5 97 132 ? ? ? 47 107 145 47 107 145 khz frequency (v cc = 8.5 v) t j = 25 c: a suffix device b suffix device c suffix device t j = t low to t high a suffix device b suffix device c suffix device f osc(high) 41 93 126 39 90 120 45.5 103 140 ? ? ? 50 113 154 50 113 154 khz frequency sweep (v cc = 7.5 v to 8.5 v, t j = 25 c) %f osc ? 5.0 ? % maximum duty cycle d (max) 74 77 80 % control input lower window input current threshold switching enabled, sink current increasing switching disabled, sink current decreasing upper window input current threshold switching enabled, source current increasing switching disabled, source current decreasing i off(low) i on(low) i off(high) i on(high) ?58 ?50 37 25 ?47.5 ?37.5 47.5 37.5 ?37 ?25 58 50  a control window input voltage lower (i sink = 25  a) upper (i source = 25  a) v low v high 1.1 4.2 1.35 4.6 1.6 5.0 v 2. tested junction temperature range for the ncp105x series: t low = ?40 ct high = +125 c
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 8 electrical characteristics (v cc = 8.0 v, for typical values t j = 25 c, for min/max values, t j is the operating junction temperature range that applies (note 3), unless otherwise noted.) characteristics symbol min typ max unit power switch circuit power switch circuit on?state resistance ncp1050, ncp1051, ncp1052 (i d = 50 ma) t j = 25 c t j = 125 c ncp1053, ncp1054, ncp1055 (i d = 100 ma) t j = 25 c t j = 125 c r ds(on) ? ? ? ? 22 42 10 23 30 55 15 28  power switch circuit & startup breakdown voltage (i d(off) = 100  a, t a = 25 c) v (br)ds 700 ? ? v power switch circuit & startup circuit off?state leakage current (v ds = 650 v) t j = 25 c (v ds = 650 v) t j = 125 c i ds(off) ? ? 25 15 40 80  a switching characteristics (r l = 50  , v ds set for i d = 0.7 i iim ) turn?on time (90% to 10%) turn?off time (10% to 90%) t on t off ? ? 20 10 ? ? ns current limit and thermal protection current limit threshold (t j = 25 c) (note 6) ncp1050 ncp1051 ncp1052 ncp1053 ncp1054 ncp1055 i lim 93 186 279 372 493 632 100 200 300 400 530 680 107 214 321 428 567 728 ma conversion power deviation (t j = 25 c) (note 7) i 2 f osc ? 0 10 %a 2 hz propagation delay, current limit threshold to power switch circuit output ncp1050, ncp1051, ncp1052 ncp1053, ncp1054, ncp1055 t plh ? ? 135 160 ? ? ns thermal protection (v cc = 8.6 v) (note 3, 4, 5) shutdown (junction temperature increasing) hysteresis (junction temperature decreasing) t sd t h 140 ? 160 75 ? ? c startup control startup/v cc regulation startup threshold/v cc regulation peak (v cc increasing) minimum operating/v cc valley voltage after turn?on hysteresis v cc(on) v cc(off) v h 8.0 7.0 ? 8.5 7.5 1.0 9.0 8.0 ? v undervoltage lockout threshold voltage, v cc decreasing v cc(reset) 4.0 4.5 5.0 v startup circuit output current (power switch circuit output = 40 v) v cc = 0 v t j = 25 c t j = ?40 to 125 c v cc = v cc(on) ? 0.2 v t j = 25 c t j = ?40 to 125 c i start 5.4 4.5 4.6 3.5 6.3 ? 5.6 ? 7.2 8.0 6.6 7.0 ma minimum start?up drain voltage (i start = 0.5 ma, v cc = v cc(on) ? 0.2 v) v start(min) ? 13.4 20 v output fault condition auto restart (v cc capacitor = 10  f, power switch circuit output = 40 v) average switching duty cycle frequency d rst f rst ? ? 6.0 3.5 ? ? % hz 3. tested junction temperature range for the ncp105x series: t low = ?40 ct high = +125 c 4. maximum package power dissipation limits must be observed. 5. guaranteed by design only. 6. adjust di/dt to reach i lim in 4.0  sec. 7. consult factory for additional options including test and trim for output power accuracy.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 9 electrical characteristics (v cc = 8.0 v, for typical values t j = 25 c, for min/max values, t j is the operating junction temperature range that applies (note 8), unless otherwise noted.) characteristics symbol min typ max unit total device power supply current after uvlo turn?on (note 9) power switch circuit enabled ncp1050, ncp1051, ncp1052 a suffix device b suffix device c suffix device ncp1053, ncp1054, ncp1055 a suffix device b suffix device c suffix device power switch circuit disabled non?fault condition fault condition i cc1 i cc2 i cc3 0.35 0.40 0.40 0.40 0.45 0.50 0.35 0.10 0.45 0.50 0.525 0.50 0.575 0.65 0.45 0.175 0.55 0.60 0.65 0.60 0.70 0.80 0.55 0.25 ma 8. tested junction temperature range for the ncp105x series: t low = ?40 ct high = +125 c 9. see non?latching fault condition timing diagram in figure 4.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 10 figure 5. oscillator frequency (a suffix) versus temperature ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 40 41 42 43 44 45 46 oscillator frequency (khz) figure 6. oscillator frequency (b suffix) versus temperature ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 92 94 96 100 102 104 oscillator frequency (khz) figure 7. oscillator frequency (c suffix) versus temperature ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 124 126 oscillator frequency (khz) figure 8. frequency sweep versus temperature ?25 25 50 150 125 ?50 0 75 100 0 3 temperature ( c) 4 5 6 7 8 9 frequency sweep (khz) v cc = v cc(on) 98 128 130 132 134 136 138 140 136 khz figure 9. maximum duty cycle versus temperature figure 10. lower window control input current thresholds versus temperature 100 khz 44 khz 142 ?25 25 50 150 125 ?50 0 75 100 76.2 76.4 temperature ( c) 76.6 76.8 77.0 77.2 77.4 77.6 maximum duty cycle (%) ?25 25 50 150 125 ?50 0 75 100 35 temperature ( c) 40 55 sink control current threshold (  a) 45 50 current rising current falling v cc = v cc(off) v cc = v cc(on) v cc = v cc(off) v cc = v cc(on) v cc = v cc(off) 2 1 30
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 11 figure 11. upper window control input current thresholds versus temperature ?50 25 50 150 125 0 100 30 temperature ( c) 34 figure 12. control input lower window clamp voltage versus temperature ?25 25 50 150 125 ?50 0 75 100 1.28 1.29 temperature ( c) 1.30 1.34 1.36 1.37 1.38 1.39 clamp voltage (v) 38 42 46 50 1.35 current rising current falling i sink = 25  a source control current threshold (  a) figure 13. control input upper window clamp voltage versus temperature ?25 25 50 150 125 ?50 0 75 100 4.52 4.54 temperature ( c) 4.56 4.58 4.60 4.64 4.66 clamp voltage (v) 4.62 i source = 25  a figure 14. on resistance versus temperature ?25 25 50 150 125 ?50 0 100 0 temperature ( c) 10 20 30 40 45 on resistance (  ) ncp1050,1,2 (i d = 50 ma) ncp1053,4,5 (i d = 100 ma) figure 15. power switch and startup circuit leakage current versus voltage 200 400 800 0 600 0 applied voltage (v) 20 40 80 100 120 leakage current (  a) 60 figure 16. power switch and startup circuit output capacitance versus applied voltage 100 300 700 600 0 200 400 500 1 applied voltage (v) 10 100 capacitance (pf) t j = ?40 c t j = 25 c t j = 125 c t j = 25 c ncp1053,4,5 ncp1050,1,2 1.31 1.33 1.32 ?25 75 5 15 25 35 75 100 300 700 500 900
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 12 figure 17. normalized peak current limit versus temperature ?25 25 50 150 125 ?50 0 75 100 0.88 temperature ( c) 0.90 0.92 normalized current limit 0.94 0.96 0.98 1.00 1.02 figure 18. supply voltage thresholds versus temperature ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 7.2 7.4 supply threshold (v) figure 19. undervoltage lockout threshold versus temperature ?25 25 50 150 125 ?50 0 75 100 4.34 4.36 temperature ( c) 4.38 4.40 4.42 4.52 4.54 4.56 undervoltage threshold (v) 7.6 7.8 8.0 8.2 8.4 8.6 startup threshold v cc(on) minimum operating threshold v cc(off) 4.50 figure 20. start current versus temperature ?25 25 50 150 125 ?50 0 75 100 0 temperature ( c) 1 2 3 5 6 7 8 start current (ma) 4 v cc = 8.3 v v cc = 0 v figure 21. startup current versus supply voltage 134 9 7 02 56 0 supply voltage (v) 1 2 3 5 6 7 startup current (ma) 4 t j = 25 c v pin 5 = 20 v 8 figure 22. startup current versus pin 5 voltage 10 1000 1 100 ?2 pin 5 voltage (v) 0 2 6 8 startup current (ma) 4 t j = 25 c v cc = 0 v v cc = 8 v 4.44 4.46 4.48 v pin 5 = 20 v
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 13 figure 23. supply current versus temperature (ncp1050/1/2) ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 0.35 0.40 0.45 0.55 supply current (ma) ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 0.41 supply current (ma) 0.50 0.42 0.43 0.45 0.46 0.47 0.44 figure 24. supply current versus temperature (ncp1053/4/5) ?25 25 50 150 125 ?50 0 75 100 temperature ( c) 0.35 0.50 0.55 0.60 0.70 supply current (ma) 0.45 figure 25. supply current when switching disable versus temperature ?25 25 50 150 125 ?50 0 75 100 0.12 temperature ( c) 0.13 0.14 supply current (ma) 0.15 0.16 0.18 0.19 0.21 0.17 figure 26. supply current in fault condition versus temperature ?25 25 50 150 125 ?50 0 75 100 13.2 temperature ( c) 13.3 13.4 supply voltage (v) 13.5 13.6 13.8 13.9 14.0 13.7 figure 27. supply voltage versus temperature 13.0 13.1 136 khz 100 khz 44 khz 136 khz 100 khz 44 khz 0.40 condition: v cc pin = 1  f to ground control pin = open drain pin = 1 k  to power supply, increase voltage until switching 0.65 0.48 0.20
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 14 operating description introduction the ncp105x series represents a new higher level of integration by providing on a single monolithic chip all of the active power, control, logic, and protection circuitry required to implement a high voltage flyback converter and compliance with very low standby power requirements for modern consumer electronic power supplies. this device series is designed for direct operation from a rectified 240 vac line source and requires minimal external components for a complete cost sensitive converter solution. potential markets include cellular phone chargers, standby power supplies for personal computers, secondary bias supplies for microprocessor keep?alive supplies and ir detectors. a description of each of the functional blocks is given below, and the representative block diagram is shown in figure 2. this device series features an active startup regulator circuit that eliminates the need for an auxiliary bias winding on the converter transformer, fault logic with a programmable timer for converter overload protection, unique gated oscillator configuration for extremely fast loop response with double pulse suppression, oscillator frequency dithering with a controlled slew rate driver for reduced emi, cycle?by?cycle current limiting, input undervoltage lockout with hysteresis, thermal shutdown, and auto restart or latched off fault detect device options. these devices are available in economical 8?pin pdip and 4?pin sot?223 packages. oscillator the oscillator is a unique fixed?frequency, duty?cycle? controlled oscillator. it charges and discharges an on chip timing capacitor to generate a precise square wave signal used to pulse width modulate the power switch circuit. during the discharge of the timing capacitor, the oscillator duty cycle output holds one input of the driver low. this action keeps the power switch circuit off, thus limiting the maximum duty cycle. a frequency modulation feature is incorporated into the ic in order to aide in emi reduction. figure 3 illustrates this frequency modulation feature. the power supply voltage, v cc , acts as the input to the built?in voltage controlled oscillator. as the v cc voltage is swept across its nominal operating range of 7.5 to 8.5 v, the oscillator frequency is swept across its corresponding range. the center oscillator frequency is internally programmed for 44 khz, 100 khz, or 136 khz operation with a controlled charge to discharge current ratio that yields a maximum power switch duty cycle of 77%. the oscillator temperature characteristics are shown in figures 5 through 9. contact an on semiconductor sales representative for further information regarding frequency options. control input the control input pin circuit has parallel source follower input stages with voltage clamps set at 1.35 and 4.6 v. current sources clamp the input current through the followers at approximately 47.5  a with 10  a hysteresis. when a source or sink current in excess of this value is applied to this input, a logic signal generated internally changes state to block power switch conduction. since the output of the control input sense is sampled continuously during t on (77% duty cycle), it is possible to turn the power switch circuit on or off at any time within t on . because it does not have to wait for the next cycle (rising edge of the clock signal) to switch on, and because it does not have to wait for current limit to turn off, the circuit has a very fast transient response as shown in figure 3. in a typical converter application the control input current is drawn by an optocoupler. the collector of the optocoupler is connected to the control input pin and the emitter is connected to ground. the optocoupler led is mounted in series with a shunt regulator (typically a tl431) at the dc output of the converter. when the power supply output is greater than the reference voltage (shunt regulator voltage plus optocoupler diode voltage drop), the optocoupler turns on, pulling down on the control input. the control input logic is configured for line input sensing as well. turn on latch the oscillator output is typically a 77% positive duty cycle square waveform. this waveform is inverted and applied to the reset input of the turn?on latch to prevent any power switch conduction during the guaranteed off time. this square wave is also gated by the output of the control section and applied to the set input of the same latch. because of this gating action, the power switch can be activated when the control input is not asserted and the oscillator output is high. the use of this unique gated turn on latch over an ordinary gated oscillator allows a faster load transient response. the power switch is allowed to turn on immediately, within the maximum duty cycle time period, when the control input signals a necessary change in state. turn off latch a turn off latch feature has been incorporated into this device series to protect the power switch circuit from excessive current, and to reduce the possibility of output overshoot in reaction to a sudden load removal. if the power switch current reaches the specified maximum current limit, the current limit comparator resets the turn off latch and turns the power switch circuit off. the turn off latch is also reset when the oscillator output signal goes low or the control input is asserted, thus terminating output mosfet conduction. because of this response to control input signals, it provides a very fast transient response and very tight load regulation. the turn off latch has an edge triggered set input which ensures that the switch can only be activated once during any oscillator period. this is commonly referred to as double pulse suppression.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 15 current limit comparator and power switch circuit the power switch circuit is constructed with a sensefet ? in order to monitor the drain current. a portion of the current flowing through the circuit goes into a sense element, r sense . the current limit comparator detects if the voltage across r sense exceeds the reference level that is present at its inverting input. if this level is exceeded, the comparator quickly resets the turn off latch, thus protecting the power switch circuit. a leading edge blanking circuit was placed in the current sensing signal path to prevent a premature reset of the turn off latch. a potential premature reset signal is generated each time the power switch circuit is driven into conduction and appears as a narrow voltage spike across current sense resistor r sense . the spike is due to the power switch circuit gate to source capacitance, transformer interwinding capacitance, and output rectifier recovery time. the leading edge blanking circuit has a dynamic behavior that masks the current signal until the power switch circuit turn?on transition is completed. the current limit propagation delay time is typically 135 to 165 nanoseconds. this time is measured from when an overcurrent appears at the power switch circuit drain, to the beginning of turn?off. care must be taken during transformer saturation so that the maximum device current limit rating is not exceeded. the high voltage power switch circuit is monolithically integrated with the control logic circuitry and is designed to directly drive the converter transformer. because the characteristics of the power switch circuit are well known, the gate drive has been tailored to control switching transitions to help limit electromagnetic interference (emi). the power switch circuit is capable of switching 700 v with an associated drain current that ranges nominally from 0.10 to 0.68 amps. startup circuit rectified ac line voltage is applied to the startup circuit on pin 5, through the primary winding. the circuit is self?biasing and acts as a constant current source, gated by control logic. upon application of the ac line voltage, this circuit routes current into the supply capacitor typically connected to pin 1. during normal operation, this capacitor is hysteretically regulated from 7.5 to 8.5 v by monitoring the supply voltage with a comparator and controlling the startup current source accordingly. this dynamic self?supply (dss) functionality offers a great deal of applications flexibility as well. the startup circuit is rated at a maximum 700 v (maximum power dissipation limits must be observed). undervoltage lockout an undervoltage lockout (uvlo) comparator is included to guarantee that the integrated circuit has sufficient voltage to be fully functional. the uvlo comparator monitors the supply capacitor input voltage at pin 1 and disables the power switch circuit whenever the capacitor voltage drops below the undervoltage lockout threshold. when this level is crossed, the controller enters a new startup phase by turning the current source on. the supply voltage will then have to exceed the startup threshold in order to turn off the startup current source. startup and normal operation of the converter are shown in figure 3. fault detector the ncp105x series has integrated fault detector circuitry for detecting application fault conditions such as open loop, overload or a short circuited output. a timer is generated by driving the supply capacitor with a known current and hysteretically regulating the supply voltage between set thresholds. the timer period starts when the supply voltage reaches the nominal upper threshold of 8.5 v and stops when the drain current of the integrated circuit draws the supply capacitor voltage down to the undervoltage lockout threshold of 7.5 v. if, during this timer period, no feedback has been applied to the control input, the fault detect logic is set to indicate an abnormal condition. this may occur, for example, when the optocoupler fails or the output of the application is overloaded or completely shorted. in this case, the part will stop switching, go into a low power mode, and begin to draw down the supply capacitor to the reset threshold voltage of 4.5 v. at that time, the startup circuit will turn on again to drive the supply to the turn on threshold. then the part will begin the cycle again, effectively sampling the control input to determine if the fault condition has been removed. this mode is commonly referred to as burst mode operation and is shown is figure 4. proper selection of the supply capacitor allows successful startup with monotonically increasing output voltage, without falsely sensing a fault condition. figure 4 shows successful startup and the evolution of the signals involved in the presence of a fault. thermal shutdown the internal thermal shutdown block protects the device in the event that the maximum junction temperature is exceeded. when activated, typically at 160 c, one input of the driver is held low to disable the power switch circuit. the power switch is allowed to resume operation when the junction temperature falls below 85 c. the thermal shutdown feature is provided to prevent catastrophic device failures from accidental overheating. it is not intended to be used as a substitute for proper heatsinking.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 16 applications two application examples have been provided in this document, and they are described in detail in this section. figure 28 shows a universal input, 6 watt converter application as well as a 5.5 w att charger application using the ncp1053b. the charger consists of the additional components q1, c13, and r7 through r10, as shown. these were constructed and tested using the printed circuit board layout shown in figure 40. the board consists of a fiber glass epoxy material (fr4) with a single side of two ounce per square foot (70  m thick) copper foil. test data from the two applications is given in figures 29 through 39. both applications generate a well?regulated output voltage over a wide range of line input voltage and load current values. the charger application transitions to a constant current output if the load current is increased beyond a preset range. this can be very effective for battery charger application for portable products such as cellular telephones, personal digital assistants, and pagers. using the ncp105x series in applications such as these offers a wide range of flexibility for the system designer. the ncp105x application offers a low cost alternative to other applications. it uses a dynamic self?supply (dss) function to generate its own operating supply voltage such that an auxiliary transformer winding is not needed. (it also offers the flexibility to override this function with an auxiliary winding if ultra?low standby power is the designer's main concern.) this product also provides for automatic output overload, short circuit, and open loop protection by entering a programmable duty cycle burst mode of operation. this eliminates the need for expensive devices overrated for power dissipation or maximum current, or for redundant feedback loops. the application shown in figure 28 can be broken down into sections for the purpose of operating description. components c1, l1 and c6 provide emi filtering for the design, although this is very dependent upon board layout, component type, etc. d1 through d4 along with c2 provide the ac to bulk dc rectification. the ncp1053 drives the primary side of the transformer, and the capacitor, c5, is an integral part of the dynamic self?supply. r1, c3, and d5 comprise an rcd snubber and r2 and c4 comprise a ringing damper both acting together to protect the ic from voltage transients greater than 700 volts and reduce radiated noise from the converter. diode d6 along with c7?9, l2, c11, and c12 rectify the transformer secondary and filter the output to provide a tightly regulated dc output. ic3 is a shunt regulator that samples the output voltage by virtue of r5 and r6 to provide drive to the optocoupler, ic2, light emitting diode (led). c10 is used to compensate the shunt regulator. when the application is configured as a charger, q1 delivers additional drive to the optocoupler led when in constant current operation by sampling the output current through r7 and r8. component selection guidelines choose snubber components r1, c3, and d5 such that the voltage on pin 5 is limited to the range from 0 to 700 volts. these components protect the ic from substrate injection if the voltage was to go below zero volts, and from avalanche if the voltage was to go above 700 volts, at the cost of slightly reduced efficiency. for lower power design, a simple rc snubber as shown, or connected to ground, can be suf ficient. ensure that these component values are chosen based upon the worst?case transformer leakage inductance and worst?case applied voltage. choose r2 and c4 for best performance radiated switching noise. capacitor c5 serves multiple purposes. it is used along with the internal startup circuitry to provide power to the ic in lieu of a separate auxiliary winding. it also serves to provide timing for the oscillator frequency sweep for limiting the conducted emi emissions. the value of c5 will also determine the response during an output fault (overload or short circuit) or open loop condition as shown in figure 4, along with the total output capacitance. resistors r5 and r6 will determine the regulated output voltage along with the reference voltage chosen with ic3. the base to emitter voltage drop of q1 along with the value of r7 will set the fixed current limit value of the charger application. r9 is used to limit the base current of q1. component r8 can be selected to keep the current limit fixed with very low values of output voltage or to provide current limit foldback with results as shown in figures 29 and 33. a relatively large value of r8 allows for enough output voltage to effectively drive the optocoupler led for fixed current limit. a low value of r8, along with resistor r10, provides for a low average output power using the fault protection feature when the output voltage is very low. c13 provides for output voltage stability when the charger application is in current limit.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 17 r5 2.00 k r6 2.20 k r4* 1.0 k c10 0.22 ic3 tl431 2n3904 r9* 22  r7* 0.5  /1 w ic2 sfh 615a?4 r3 47 c12 1.0 c11 220 d6 1n5822 c7 330 c8 330 c9 330 c5 10 d5 mur160 c2 33 d2 1n4006 d1 1n4006 d3 1n4006 d4 1n4006 l1 10 mh v in 85 ? 265 v ac f1 2.0 a t1 5.25 v 1.2 a r8* 1.2  /1 w c1 0.1 ncp1053b c6 100 p q1* l2 5  h figure 28. universal input 6/5 watt converter/charger application cooper electronic technologies part # ctx22?15348 primary: 97 turns of #29 awg, pin 4 = start, pin 5 = finish secondary: 5 turns of 0.40 mm, pins 2 and 1 = start, pins 7 and 8 = finish gap: designed for total 1.24 mh primary inductance core: tsf?7070 bobbin: pins 3 and 6 removed, ee19 t1: c4 50 p c3 220 p r1 91 k r2 2.2 k r10* 220 c13* 1.0 * add q1, c13, and r7?r10, and change r4 to 2.0 k  for charger output
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 18 test conditions converter results charger results line regulation v in = 85 ? 265 v ac ; i out = 120 ma v in = 85 ? 265 v ac ; i out = 600 ma v in = 85 ? 265 v ac ; i out = 1.2 a 2 mv 1 mv 2 mv v in = 85 ? 265 v ac ; i out = 100 ma v in = 85 ? 265 v ac ; i out = 500 ma v in = 85 ? 265 v ac ; i out = 1.00 a 11 mv 24 mv 41 mv load regulation v in = 85 v ac ; i out = 120 ma ? 1.2 a v in = 110 v ac ; i out = 120 ma ? 1.2 a v in = 230 v ac ; i out = 120 ma ? 1.2 a v in = 265 v ac ; i out = 120 ma ? 1.2 a 12 mv 13 mv 12 mv 13 mv v in = 85 v ac ; i out = 100 ma ? 1.00 a v in = 110 v ac ; i out = 100 ma ? 1.00 a v in = 230 v ac ; i out = 100 ma ? 1.00 a v in = 265 v ac ; i out = 100 ma ? 1.00 a 58 mv 65 mv 71 mv 67 mv output ripple v in = 110 v ac ; i out = 1.2 a v in = 230 v ac ; i out = 1.2 a 86 mv p?p 127 mv p?p v in = 110 v ac ; i out = 1.00 a v in = 230 v ac ; i out = 1.00 a 80 mv p?p 155 mv p?p efficiency v in = 110 v ac ; i out = 1.2 a v in = 230 v ac ; i out = 1.2 a 72.4% 69.6% v in = 110 v ac ; r 8 = 1.2  , i out = 1.00 a v in = 230 v ac ; r 8 = 1.2  , i out = 1.00 a 54.6% 53.6% v in = 110 v ac ; r 8 = 0  , i out = 1.00 a v in = 230 v ac ; r 8 = 0  , i out = 1.00 a 66.1% 63.3% no load input power v in = 110 v ac ; i out = 0 a v in = 230 v ac ; i out = 0 a 100 mw 200 mw 100 mw 200 mw standby output power v in = 110 v ac ; p in = 1 w v in = 230 v ac ; p in = 1 w 680 mw 630 mw 640 mw 540 mw short circuit load input power v in = 110 v ac ; v out = 0 v (shorted) v in = 230 v ac ; v out = 0 v (shorted) 400 mw 550 mw v in = 110 v ac ; r 8 = 1.2  , v out = 0 v (shorted) v in = 230 v ac ; r 8 = 1.2  , v out = 0 v (shorted) 750 mw 900 mw v in = 110 v ac ; r 8 = 0  , v out = 0 v (shorted) v in = 230 v ac ; r 8 = 0  , v out = 0 v (shorted) 700 mw 850 mw figure 29. converter and charger test data summary
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 19 figure 30. converter line regulation 180 280 80 130 230 5.208 line input voltage (v ac ) 5.210 5.212 5.214 5.218 5.220 5.224 output voltage (v dc ) figure 31. charger line regulation figure 32. converter load regulation 12 0 0.5 1.5 0 load current (a) 1 2 output voltage (v) figure 33. charger load regulation 3 4 5 6 figure 34. converter load transient response figure 35. charger load transient response i out = 120 ma i out = 600 ma i out = 1.2 a v in = 85 v ac v in = 110 v ac v in = 230 v ac v in = 265 v ac 180 280 80 130 230 5.14 line input voltage (v ac ) 5.18 5.19 5.20 5.21 5.22 5.23 output voltage (v dc ) i out = 100 ma i out = 500 ma i out = 1 a 1.0 1.5 0 0 load current (a) 1 2 output voltage (v) 3 4 5 6 0.5 5.216 5.222 5.15 5.16 5.17 v in = 85 v ac v in = 110 v ac v in = 230 v ac v in = 265 v ac ch1: v out ch2: i out = 0.2 a/div (v in = 230 v ac ) ch1: v out ch2: i out = 0.2 a/div (v in = 230 v ac )
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 20 v in = 85 v ac v in = 85 v ac v in = 265 v ac figure 36. converter efficiency 1.0 0 0.5 1.5 50 load current (a) 55 60 65 70 75 efficiency (%) figure 37. charger efficiency figure 38. converter on/off line transient response figure 39. charger on/off line transient response v in = 110 v ac v in = 230 v ac v in = 265 v ac 0.5 1.5 0 1.0 45 load current (a) 50 55 65 efficiency (%) v in = 110 v ac v in = 230 v ac 60 70 ch1: v out ch2: rectified v in (v in = 230 v ac , i out = 0.5 a) ch1: v out ch2: rectified v in (v in = 230 v ac , i out = 0.5 a)
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 21 board graphics figure 40. printed circuit board and component layout d1 d2 d4 d3 d6 dc output r5 ic3 l2 + + r3 r6 c10 + + c11 + c12 ic2 c9 c8 c7 c6 t1 c2 + ic1 + c5 d5 r1 c3 c4 r2 l1 c1 f1 ac input r4 r9 r8 q1 r7 ncp1050 series top view bottom view 2.75 2.25 ? ? ? ? ? ? ?
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 22 device ordering information (note 10) device package shipping r ds(on) (  ) i pk (ma) ncp1050pzzz 100 ncp1051pzzz 30 200 ncp1052pzzz dip?8 50 units/rail 300 ncp1053pzzz dip?8 case 626a 50 units/rail 400 ncp1054pzzz 15 530 ncp1055pzzz 680 ncp1050stzzzt3 100 ncp1051stzzzt3 30 200 ncp1052stzzzt3 sot?223 4000 units/ta p e & reel 300 ncp1053stzzzt3 sot?223 case 318e 4000 units/tape & reel 400 ncp1054stzzzt3 15 530 ncp1055stzzzt3 680 10. consult factory for additional optocoupler fail?safe latching, frequency, current limit and line input options. 11. zzz = 44, 100, or 136 for different frequency options.
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 23 package dimensions dip?8 p suffix case 626a?01 issue o notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. package contour optional (round or square corners). 4. dimension l to center of lead when formed parallel. 5. dimensions a and b are datums. 14 5 8 f note 3 ?t? seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040  b a sot?223 st suffix case 318e?04 issue k h s f a b d g l 4 123 0.08 (0003) c m k j dim a min max min max millimeters 0.249 0.263 6.30 6.70 inches b 0.130 0.145 3.30 3.70 c 0.060 0.068 1.50 1.75 d 0.024 0.035 0.60 0.89 f 0.115 0.126 2.90 3.20 g 0.087 0.094 2.20 2.40 h 0.0008 0.0040 0.020 0.100 j 0.009 0.014 0.24 0.35 k 0.060 0.078 1.50 2.00 l 0.033 0.041 0.85 1.05 m 0 10 0 10 s 0.264 0.287 6.70 7.30 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 
ncp1050, ncp1051, ncp1052, ncp1053, ncp1054, ncp1055 http://onsemi.com 24 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ncp1050/d the products described herein (ncp1050, 1051, 1052, 1053, 1054, 1055), may be covered by one or more of the following u.s. pate nts: 4,553,084; 5,418,410; 5,477,175; 6,137,696; 6,137,702; 6,271,735, 6,480,043, 6,362,067, 6,587,357. there may be other patents p ending. sensefet is a trademark of semiconductor components industries, llc (scillc) literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com n. american technical support : 800?282?9855 toll free usa/canada


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